On site | Design Engineer V (California) — Up to $135/hr

We are sharing a specialised remote opportunity for experienced ASIC power engineers to support a leading technology company working on advanced AR/VR hardware systems. This project focuses on ASIC power analysis and optimisation for next-generation AR/VR products. The role involves evaluating power performance, running ASIC design flows, analysing synthesis and physical design reports, and supporting data-driven optimisation of hardware systems used in machine learning-enabled devices. Key Responsibilities Perform PPA optimisation using Fusion Compiler Conduct RTL and netlist-level power analysis Post-process and analyse report log files using scripting tools for data extraction and analysis Setup, run, debug, and analyse reports across ASIC design flows including synthesis, place-and-route, power, and timing Implement selected blocks at RTL and UPF level Develop scripts for data analysis and report automation Document workflows and communicate technical findings clearly Ideal Profile Strong candidates may have: 10+ years of experience as an ASIC power engineer, CAD engineer, or physical design engineer Experience with power estimation tools, synthesis workflows, and physical design flows Strong understanding of power trade-offs in ASIC design and back-end implementation Hands-on experience in scripting and data analysis Experience working with ASIC design flows and power optimisation methodologies Strong problem-solving and analytical skills Educational Background: Bachelors degree in Electrical Engineering, Computer Science, or equivalent experience Nice to Have Experience with Synopsys tools (DC, ICC, PTPX/PrimePower, VCS, Verdi) or Cadence tools (Joules) Experience with Python, Perl, or similar scripting tools for data analysis and automation Experience using Excel or Matlab for modelling, data visualisation, or analysis Knowledge of low power design methodologies and UPF power intent specifications Experience with silicon power characterisation or IP/SoC power profiling Why This Opportunity Contribute to the development of next-generation AR/VR hardware systems Work on advanced ASIC power optimisation and machine learning-enabled device architectures Collaborate with leading technology teams working on cutting-edge consumer hardware Apply deep engineering expertise in high-impact semiconductor development projects Contract Details Full-time role supporting a leading technology company Remote work with potential collaboration across distributed engineering teams Competitive compensation between $100–$135 per hour depending on experience Engagement administered through an enterprise staffing partner Projects may extend or adjust depending on scope and performance About the Platform This opportunity is available through a leading AI-driven work platform.